RTAX250SL - RadTolerant FPGAs
v5.3 www.DataSheet4U.com RTAX-S/SL RadTolerant FPGAs Radiation Performance SEU-Hardened Registers Eliminate the Need for TripleModule Redundancy (TMR) Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg SEU Rate < 10-10 Errors/Bit-Day in Worst-Case Geosynchronous Orbit Expected SRAM Upset Rate of <10-10 Errors/Bit-Day with Use of Error Detection and Correction (EDAC) IP (included) with Integrated SRAM Scrubber Single-Bit Correction, Double-Bit De
RTAX250SL Features
* Single-Chip, Nonvolatile Solution 1.5 V Core Voltage for Low Power Flexible, Multi-Standard I/Os:
* 1.5 V, 1.8 V, 2.5 V, 3.3 V Mixed Voltage Operation
* Bank-Selectable I/Os
* 8 Banks per Chip
* Single-Ended I/O Standards: LVTTL, LVCMOS,
