* s s s s s s Two fully selectable clock inputs. Fully integrated PLL. 336 MHz to 1 GHz output frequencies. HSTL outputs. HSTL and LVPECL reference clocks. 32-pin TQFP package. Description PCLK0_EN (PULL-UP) PCLK1_EN (PULL-UP) TESTM (PULL-UP) PLLREF_EN (PULL-UP) REF_SEL (PULL-UP) 1 HSTL_CLK (PULL-UP
LCK4801
Agere Systems
160.93 KB
Low-voltage hstl differential clock.
Preliminary Data Sheet July 2001
LCK4801 Low-Voltage HSTL Differential Clock
General
The LCK4801 is a low-voltage, 3.3 V HSTL differential clock synt.
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