LCK4801 - Low-Voltage HSTL Differential Clock

Agere Systems

LCK4801 Datasheet Preview — Preview of LCK4801 PDF

Datasheet Details

Part number	LCK4801
Manufacturer	Agere Systems
File Size	160.93 KB
Description	Low-Voltage HSTL Differential Clock
Datasheet	LCK4801_AgereSystems.pdf

LCK4801 Product details

Description

PCLK0_EN (PULL-UP) PCLK1_EN (PULL-UP) TESTM (PULL-UP) PLLREF_EN (PULL-UP) REF_SEL (PULL-UP) 1 HSTL_CLK (PULL-UP) HSTL_CLK (PULL-UP) PECL_CLK (PULL-UP) PECL_CLK (PULL-UP) (PULL-UP) EXTFB_IN (HSTL) (PULL-DOWN) EXTFB_EN (PULL-UP) EXTFB_OUT (HSTL) SEL[4:0] (PULL-UP) RESET (PULL-UP) PLL_BYPASS (PULL-UP) 2274.a (F) 0 0 /M 1 0 1 /N PLL 0 1 PCLK0 PCLK0 (HSTL) PCLK1 PCLK1 (HSTL) EXTFB_OUT DECODE Figure 1. LCK4801 Logic Diagram LCK4801 Low-Voltage HSTL Differential Clock Preliminary Data Sheet Jul

Features

s s s s s s Two fully selectable clock inputs. Fully integrated PLL. 336 MHz to 1 GHz output frequencies. HSTL outputs. HSTL and LVPECL reference clocks. 32-pin TQFP package.

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Published: Apr 25, 2005 |