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OR3TP12 Field-Programmable System Chip (FPSC) Embedded Master/Target PCI Interface

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Description

Data Sheet March 2000 ORCA® OR3TP12 Field-Programmable System Chip (FPSC) Embedded Master/Target PCI Interface Introduction Lucent Technologies Micro.
7 What Is an FPSC? 7 FPSC Overview 7 FPSC Gate Counting 7 FPGA/Embedded Core Interface 7 FPSC Design Kit 8 ORCA Foundry Development System 8 FPGA Lo.

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Datasheet Specifications

Part number
OR3TP12
Manufacturer
Agere Systems
File Size
2.39 MB
Datasheet
OR3TP12_AgereSystems.pdf
Description
Field-Programmable System Chip (FPSC) Embedded Master/Target PCI Interface

Features

* include registers for device and subsystem identification and autoconfiguration, support for 64-bit addressing, and multimaster capability that allows any PCI bus Master access to any PCI bus Target. PCI Bus Core Highlights s Implemented in an ORCA Series 3 base array, displacing the bottom four r

Applications

* ranging from desktop PC busing to highbandwidth backplanes in networking and communications equipment. The PCI bus specification
* provides for both 5 V and 3.3 V signaling environments. The PCI interface clock speed is specified in the range from dc to 66 MHz with detailed specifications at 33 M

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