TAAD08JU2 Datasheet - Agere Systems

TAAD08JU2 T1/E1/J1 ATM Processor

11 Pin Definitions 12 Pin Description 12 Package Pin Layout 21 Block Diagram 27 Software Components 28 9.1 Firmware29 9.2 Device Manager29 9.3 Setup File Utility (SFU) 30 9.4 TAAD08JU2 Application Code31 9.5 System Software32 9.6 Software Development Environment 32 9.7 Notes 33 Functional Overview3.

TAAD08JU2 Features

* s s System-on-a-chip integrated circuit supports lowspeed ATM access for next-generation wireless base transmission station (BTS), base station controller (BSC), node-B, radio network controller (RNC), and remote access concentrator (RAC) applications. IC provides an integrated octal framer that su

TAAD08JU2 Datasheet (2.28 MB)