6259 Datasheet - Allegro MicroSystems

6259 8-BIT ADDRESSABLE DMOS POWER DRIVER

and INPUT REQUIREMENTS ENABLE Four modes of operation are selectable by controlling the CLEAR and ENABLE inputs as shown above. 50% DATA t PLH ADDRESSED OUTPUT t PHL 90% 10% In the addressable-latch mode, data at the DATA input is written into the addressed transparent latch. The addressed ou.

6259 ADVANCE INFORMATION (Subject to change without notice) January 24, 2000 POWER GROUND LOGIC SUPPLY S 0 (LSB) OUT 0 OUT 1 OUT 2 OUT 3 S1 LOGIC GROUND POWER GROUND 1 2 3 4 VDD 20 19 18 17 POWER GROUND CLEAR DATA OUT 7 OUT 6 OUT 5 OUT 4 ENABLE S 2 (MSB) POWER GROUND 8-BIT ADDRESSABLE DMOS POWER DRIVER The A6259KA and A6259KLW combine a 3-to-8 line CMOS decoder and accompanying data latches, control circuitry, and DMOS outputs in a multi-functional power driver capable of storing single-line da.

6259 Features

* s 50 V Minimum Output Clamp Voltage s 250 mA Output Current (all outputs simultaneously) s 1.3 Ω Typical rDS(on) s Low Power Consumption s Replacements for TPIC6259N and TPIC6259DW Always order by complete part number: Part Number Package A6259KA 20-pin DIP A6259KLW 20-lead SOIC RθJA 55°C/W 70°C/W

6259 Datasheet (172.21 KB)