6812 Datasheet - Allegro MicroSystems

6812 DABiC-IV/ 20-BIT SERIAL-INPUT/ LATCHED SOURCE DRIVER

Data Sheet 26182.126A 6812 A6812xA LOAD SUPPLY SERIAL DATA OUT OUT 20 OUT 19 OUT 18 OUT 17 OUT 16 OUT 15 OUT 14 OUT 13 OUT 12 OUT 11 BLANKING GROUND 1 2 3 4 5 6 VBB VDD 28 27 26 25 24 23 LOGIC SUPPLY SERIAL DATA IN OUT 1 OUT 2 OUT 3 OUT 4 OUT 5 OUT 6 OUT 7 OUT 8 OUT 9 OUT 10 STROBE CLOCK DABiC-IV, 20-BIT SERIAL-INPUT, LATCHED SOURCE DRIVER The A6812 devices combine a 20-bit CMOS shift register, accompanying data latches and control circuitry with bipolar sourcing outputs and pnp activ.

6812 Features

* an increased data input rate (compared with the older UCN/UCQ5812-F) and a controlled output slew rate. The CMOS shift register and latches allow direct interfacing with microprocessor-based systems. With a 3.3 V or 5 V logic supply, they will operate to at least 10 MHz. A CMOS serial data output pe

6812 Datasheet (178.79 KB)