6B273 Datasheet - Allegro MicroSystems

6B273 8-BIT LATCHED DMOS POWER DRIVER

Terminal No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Terminal Name CLEAR Function When (active) LOW, all latches are reset and all outputs go HIGH (turn OFF). CMOS data input to a latch. When strobed, the output then inverts the data input (IN1 = HIGH, OUT1 = LOW). CMOS data input to a l.

6B273 ADVANCE INFORMATION (Subject to change without notice) January 24, 2000 8-BIT LATCHED DMOS POWER DRIVER The A6B273KA and A6B273KLW combine eight (positive-edgetriggered D-type) data latches and DMOS outputs for systems requiring relatively high load power. Driver applications include relays, solenoids, and other medium-current or high-voltage peripheral power loads. The CMOS inputs and latches allow direct interfacing with microprocessor-based systems. Use with TTL may require appropriate.

6B273 Features

* s 50 V Minimum Output Clamp Voltage s 150 mA Output Current (all outputs simultaneously) s 5 Ω Typical rDS(on) s Low Power Consumption s Replacements for TPIC6B273N and TPIC6B273DW Always order by complete part number: Part Number Package A6B273KA 20-pin DIP A6B273KLW 20-lead SOIC RθJA 55°C/W 70°C

6B273 Datasheet (129.69 KB)