Data Active Time Before Clock Pulse (Data Set-Up Time) Data Active Time After Clock Pulse (Data Hold Time) Clock Pulse Width Time Between Clock Activation and Strobe Strobe Pulse Width Symbol tsu(D) th(D) tw(CH) tsu(C) tw(STH) Time (ns) 25 25 50 100 50 NOTE: Timing is representative of a 10 MHz c
www.DataSheet4U.com Data Sheet 26185.112B A6821 DABiC-5 8-Bit Serial Input Latched Sink Drivers A merged combination of bipolar and MOS technology gives these devices an interface flexibility beyond the reach of standard logic buffers and power driver arrays.
Typical applications include driving multiplexed LED displays or incandescent lamps.
The A6821 has an eight-bit CMOS shift register and CMOS control circuitry, eight CMOS data latches, and eight bipolar current-sinking Darlington output dr
A6821 Features
* 3.3 V to 5 V logic supply range Power on reset (POR) To 10 MHz data input rate CMOS, TTL compatible
* 40°C operation available
* ABSOLUTE MAXIMUM RATINGS Output Voltage, VOUT 50 V Logic Supply Voltage, VDD 7 V Input Voltage Range, VIN
Datasheet Details
A6821
Allegro MicroSystems
256.58 KB
Dabic-5 8-bit serial input latched sink drivers.
📁 Related Datasheet
📌 All Tags
