* True Dual-Port memory cells that allow simultaneous access of the same memory location
* Organisation: 524,288/262,144 × 18[1]
* Fully Synchronous, independent operation on both ports
* Selectable Pipeline or Flow-Through output mode
* Fast clock speeds in P
AS9C25512M2018L Datasheet (1.12 MB)
AS9C25512M2018L
Alliance Semiconductor Corporation
1.12 MB
2.5v 512/256k x 18 synchronous dual-port sram.
September 2004 Preliminary Information ® AS9C25512M2018L AS9C25256M2018L www.DataSheet4U.com 2.5V 512/256K X 18 Synchronous Dual-port SRAM with 3.3V.
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