AS4C128M8D3L Datasheet (Alliance Semiconductor)

AS4C128M8D3L, 1Gb DDR3L

1Gb DDR3L AS4C128M8D3L Revision History AS4C128M8D3L - 78-ball FBGA PACKAGE Revision Rev 1.0 Rev 2.0 Details Preliminary datasheet Added "Backward compatible to VDD & VDDQ = 1.5V +/0.075V" - page 2 Updated Table 12.

Recommended DC Operating Conditions page 21 Added CL=5 & CL=6 to Table 18 page 26 Date April 2014 August 2014 Confidential 1 Rev.

2.0 Aug.

/2014 1Gb DDR3L AS4C128M8D3L Confidential 128M x 8 bit DDR3L Synchronous DRAM (SDRAM) Advanced

AS4C128M8D3L Features

* JEDEC Standard Compliant

* Power supplies: VDD & VDDQ = +1.35V

* Backward compatible: VDD & VDDQ = 1.5V +/- 0.075V

* Operating temperature: - Commercial (0 ~ 95°C) - Industrial (-40 ~ 95°C)

* Supports JEDEC clock jitter specification

* Fully synchronous operation

* Fast