* JEDEC Standard Compliant
* Power supplies: VDD & VDDQ = +1.35V
* Backward compatible to VDD & VDDQ = 1.5V ±0.075V
* Operating temperature: -40~95°C (TC)
* Supports JEDEC clock jitter specification
* Fully synchronous operation
* Fast clock ra
AS4C256M16D3LA-12BIN Datasheet (2.17 MB)
AS4C256M16D3LA-12BIN
Alliance Semiconductor
2.17 MB
256m x 16 bit ddr3l synchronous dram.
AS4C256M16D3LA-12BIN Revision History 4Gb AS4C256M16D3LA-12BIN - 96 ball FBGA PACKAGE Revision Details Rev 1.0 Preliminary datasheet Date May. 2016 .
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