AS4C64M16D2 - 1Gb (64M x 16 bit) DDRII Synchronous DRAM (SDRAM)

Alliance Semiconductor

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Datasheet Details

Part number	AS4C64M16D2
Manufacturer	Alliance Semiconductor
File Size	1.40 MB
Description	1Gb (64M x 16 bit) DDRII Synchronous DRAM (SDRAM)
Datasheet	AS4C64M16D2-AllianceSemiconductor.pdf

AS4C64M16D2 Product details

Description

Symbol Type Description CK, CK# Input Differential Clock: CK, CK# are driven by the system clock.All SDRAM input signals are sampled on the crossing of positive edge of CK and negative edge of CK#.Output (Read) data is referenced to the crossings of CK and CK# (both directions of crossing).CKE BA0-BA2 A0-A12 Input Input Input Clock Enable: CKE activates (HIGH) and deactivates (LOW) the CK signal.If CKE goes LOW synchronously with clock, the internal clock is suspended from the next

Features

JEDEC Standard Compliant.
JEDEC standard 1.8V I/O (SSTL_18-compatible).
Power supplies: VDD & VDDQ = +1.8V ± 0.1V.
Operating temperature: - Commercial (0 ~ 85°C) - Industrial (-40 ~ 95°C).
Supports JEDEC clock jitter specification.
Fully synchronous operation.
Fast clock rate: 400MHz.
Differential Clock, CK & CK#.
Bidirectional single/differential data strobe -DQS & DQS#.
8 internal banks for concurrent op.

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Published: Feb 10, 2016 |