AS4C64M16D2 Datasheet - Alliance Semiconductor

AS4C64M16D2 - 1Gb (64M x 16 bit) DDRII Synchronous DRAM (SDRAM)

Symbol Type Description CK, CK# Input Differential Clock: CK, CK# are driven by the system clock.

All SDRAM input signals are sampled on the crossing of positive edge of CK and negative edge of CK#.

Output (Read) data is referenced to the crossings of CK and CK# (both directions of crossing).

AS4C64M16D2 Features

* JEDEC Standard Compliant

* JEDEC standard 1.8V I/O (SSTL_18-compatible)

* Power supplies: VDD & VDDQ = +1.8V ± 0.1V

* Operating temperature: - Commercial (0 ~ 85°C) - Industrial (-40 ~ 95°C)

* Supports JEDEC clock jitter specification

* Fully synchro

Datasheet Details

AS4C64M16D2

Alliance Semiconductor

1.40 MB

1gb (64m x 16 bit) ddrii synchronous dram (sdram).

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