* e Low and CE2 is High for read cycle. Address valid prior to or coincident with CE1 transition Low and CE2 transition High. All read cycle timings are referenced from the last valid address to the first transitioning address. CE1 or WE must be High or CE2 Low during address transitions. Either CE or
AS7C164
Alliance Semiconductor
187.10 KB
5v 8k x 8 cmos sram.
2&72%(5#4<<<
®
$6:&497
89#;.[;#&026#65$0 )HDWXUHV
* AS7C164 (5V version)
* Commercial temperatur
* Organization: 8,192 words.
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