Description
January 2003, ver.11.1 ® FLEX 8000 Programmable Logic Device Family Data Sheet 1 .
Altera’s Flexible Logic Element MatriX (FLEX®) family combines the benefits of both erasable programmable logic devices (EPLDs) and fieldprogrammable.
Features
* Low-cost, high-density, register-rich CMOS programmable logic device (PLD) family (see Table 1)
* 2,500 to 16,000 usable gates
* 282 to 1,500 registers
* System-level features
* In-circuit reconfigurability (ICR) via external configuration devices or intelligent co
Applications
* because it combines the fine-grained architecture and high register count characteristics of FPGAs with the high speed and predictable interconnect delays of EPLDs. Logic is implemented in LEs that include compact 4-input look-up tables (LUTs) and programmable registers. High performance is provided
