AD5683 Datasheet | Analog Devices

FEATURES Ultrasmall package: 2 mm × 2 mm, 8-lead LFCSP High relative accuracy (INL): ±2 LSB maximum at 16 bits AD5683R/AD5682R/AD5681R Low drift, 2.5 V reference: 2 ppm/°C typical Selectable span output: 2.5 V or 5 V AD5683 External reference only Selectable span output: VREF or 2 × VREF Total unadjusted error (TUE): 0.06% of FSR maximum Offset error: ±1.5 m V maximum Gain error: ±0.05% of FSR maximum Low glitch: 0.1 n V-sec High drive capability: 20 m A Low power: 1.2 m W at 3.3 V Independent logic supply: 1.8 V logic patible Wide operating temperature range: - 40°C to +105°C Robust 4 k V HBM ESD protection APPLICATIONS Process controls Data acquisition systems Digital gain and offset adjustment Programmable voltage sources GENERAL DESCRIPTION The AD5683R/AD5682R/AD5681R/AD5683, members of the nano DAC+® family, are low power, single-channel, 16-/14-/12-bit buffered voltage out digital-to-analog converters (DACs). The devices, except the AD5683, include an enabled by default internal 2.5 V reference, offering 2 ppm/°C drift. The output span can be programmed to be 0 V to VREF or 0 V to 2 × VREF. All devices operate from a single 2.7 V to 5.5 V supply and are guaranteed monotonic by design. The devices are available in a 2.00 mm × 2.00 mm, 8-lead LFCSP or a 10-lead MSOP. The internal power-on reset circuit ensures that the DAC register is written to zero scale at power-up while the internal output buffer is configured in normal mode. The AD5683R/AD5682R/AD5681R/AD5683 contain a power-down mode that reduces the current consumption of the device to 2 µA (maximum) at 5 V and provides software selectable output loads while in power-down mode. The AD5683R/AD5682R/AD5681R/AD5683 use a versatile 3-wire serial interface that operates at clock rates of up to 50 MHz. Some devices also include asynchronous RESET pin and VLOGIC pin options, allowing 1.8 V patibility. Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However,...