AD7191

Sigma-Delta ADC

Analog Devices

AD7191 Features

* Pin-programmable output rate Output data rate: 10 Hz, 50 Hz, 60 Hz, 120 Hz Pin-programmable PGA Gain: 1, 8, 64, 128 Pin-programmable power-down and reset RMS noise: 15 nV @ 10 Hz (gain = 128) Up to 21.5 noise free bits (gain = 1) Internal or external clock Bridge power-down switch Offset drift: 5 nV

AD7191 General Description

The AD7191 is a low noise, complete analog front end for high precision measurement applications. It contains a low noise, 24-bit sigma-delta (Σ-Δ) ADC. The on-chip low noise gain stage means that signals of small amplitude can be interfaced directly to the ADC. It contains two differential analog i.

AD7191 Datasheet (541.55 KB)