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ADN2865 Clock and Data Recovery

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Description

www.DataSheet4U.com Continuous Rate 12.3Mb/s to 2.7Gb/s Clock and Data Recovery IC w/Loop Timed SERDES Preliminary Technical Data .
The ADN2865 provides the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 12.

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Features

* Serial data input: 12.3 Mb/s to 2.7 Gb/s Exceeds ITU-T Jitter Specifications Integrated Limiting Amp: 6mV sensitivity Adjustable slice level: ±100 mV Patented dual-loop clock recovery architecture Programmable LOS detect and Slice Level Integrated PRBS Generator and Detector No reference clock requi

Applications

* Passive Optical Network s SONET OC-1/3/12/48 and all associated FEC rates Fibre Channel, 2× Fibre Channel , GbE, HDTV, etc. WDM transponders Test equipment FUNCTIONAL BLOCK DIAGRAM Figure 1 ADN2865 Functional Block Diagram Rev. PrA Information furnished by Analog Devices is believed to be accurate

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