ADN2865 Datasheet - Analog Devices

ADN2865 Clock and Data Recovery

The ADN2865 provides the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 12.3 Mb/s to 2.7 Gb/s. An integrated deserialiser supports 8 bit parallel transfer to an FPGA or digital ASIC. The recovered clock can simultaneously serialize.

ADN2865 Features

* Serial data input: 12.3 Mb/s to 2.7 Gb/s Exceeds ITU-T Jitter Specifications Integrated Limiting Amp: 6mV sensitivity Adjustable slice level: ±100 mV Patented dual-loop clock recovery architecture Programmable LOS detect and Slice Level Integrated PRBS Generator and Detector No reference clock requi

ADN2865 Datasheet (476.54 KB)