ADP1762 Datasheet (Analog Devices) - CMOS Linear Regulator

ADP1762, CMOS Linear Regulator

The ADP1762 is a low noise, low dropout (LDO) linear regulator.

It is designed to operate from a single input supply with an input voltage as low as 1.10 V, without the requirement of an external bias supply, to increase efficiency and provide up to 2 A of output current.

The low 62 mV typical dropo

ADP1762 Features

* 2 A maximum output current Low input voltage supply range VIN = 1.10 V to 1.98 V, no external bias supply required Fixed output voltage range: VOUT_FIXED = 0.9 V to 1.5 V Adjustable output voltage range: VOUT_ADJ = 0.5 V to 1.5 V Ultralow noise: 2 μV rms, 100 Hz to 100 kHz Noise spectral density 4 n