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ADUC824 - Dual-Channel 16-/24-Bit ADCs

This page provides the datasheet information for the ADUC824, a member of the ADU Dual-Channel 16-/24-Bit ADCs family.

Datasheet Summary

Description

TEMP SENSOR INTERNAL BANDGAP VREF PROG.

Features

  • High Resolution Sigma-Delta ADCs Two Independent ADCs (16- and 24-Bit Resolution) Programmable Gain Front End 24-Bit No Missing Codes, Primary ADC 13-Bit p-p Resolution @ 20 Hz, 20 mV Range 18-Bit p-p Resolution @ 20 Hz, 2.56 V Range Memory 8 KB On-Chip Flash/EE Program Memory 640 Bytes On-Chip Flash/EE Data Memory Flash/EE, 100 Year Retention, 100 Kcycles Endurance 256 Bytes On-Chip Data RAM 8051-Based Core 8051-Compatible Instruction Set (12.58 MHz Max) 32 kHz External Crystal, On-Chip Program.

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Datasheet preview – ADUC824

Datasheet Details

Part number ADUC824
Manufacturer Analog Devices
File Size 1.04 MB
Description Dual-Channel 16-/24-Bit ADCs
Datasheet download datasheet ADUC824 Datasheet
Additional preview pages of the ADUC824 datasheet.
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Full PDF Text Transcription

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a MicroConverter ®, Dual-Channel 16-/24-Bit ADCs with Embedded FLASH MCU ADuC824 FUNCTIONAL BLOCK DIAGRAM AVDD AIN1 AIN2 MUX BUF PGA PRIMARY 24-BIT ⌺-⌬ ADC CURRENT SOURCE MUX IEXC1 IEXC2 AVDD FEATURES High Resolution Sigma-Delta ADCs Two Independent ADCs (16- and 24-Bit Resolution) Programmable Gain Front End 24-Bit No Missing Codes, Primary ADC 13-Bit p-p Resolution @ 20 Hz, 20 mV Range 18-Bit p-p Resolution @ 20 Hz, 2.56 V Range Memory 8 KB On-Chip Flash/EE Program Memory 640 Bytes On-Chip Flash/EE Data Memory Flash/EE, 100 Year Retention, 100 Kcycles Endurance 256 Bytes On-Chip Data RAM 8051-Based Core 8051-Compatible Instruction Set (12.
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