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National Semiconductor
National Semiconductor

CD4014BC Datasheet

8-Stage Static Shift Register


CD4014BC Datasheet Preview


February 1988
CD4014BM CD4014BC 8-Stage Static Shift Register
General Description
The CD4014BM CD4014BC is an 8-stage parallel input se-
rial output shift register A parallel serial control input en-
ables individual JAM inputs to each of 8 stages Q outputs
are available from the sixth seventh and eighth stages All
outputs have equal source and sink current capabilities and
conform to standard ‘‘B’’ series output drive
When the parallel serial control input is in the logical ‘‘0’’
state data is serially shifted into the register synchronously
with the positive transition of the clock When the parallel
serial control input is in the logical ‘‘1’’ state data is jammed
into each stage of the register synchronously with the posi-
tive transition of the clock
All inputs are protected against static discharge with diodes
to VDD and VSS
Features
Y Wide supply voltage range
3 0V to 15V
Y High noise immunity
Y Low power TTL
0 45 VDD (typ )
Fan out of 2 driving 74L
compatibility
or 1 driving 74LS
Y 5V – 10V – 15V parametric ratings
Y Symmetrical output characteristics
Y Maximum input leakage
1 mA at 15V over full temperature range
Connection Diagram
Dual-In-Line Package
Truth Table
Parallel
Serial
Q1
CL
Input
Serial
PI 1 PI n
(Internal)
Qn
Control
LX
1 00
0
0
LX
1 10
1
0
LX
1 01
0
1
LX
1 11
1
1
L0
L1
KX
0
0
X
Level change
X e Don’t care case
XX
XX
XX
0 Qnb1
1 Qnb1
Q1 Qn No Change
Order Number CD4014B
Top View
Logic Diagram
TL F 5947 – 1
C1995 National Semiconductor Corporation TL F 5947
TL F 5947 – 2
RRD-B30M105 Printed in U S A
Page 1

Absolute Maximum Ratings (Notes 1 2)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Supply Voltage (VDD)
Input Voltage (VIN)
Storage Temperature Range (TS)
Power Dissipation (PD)
Dual-In-Line
Small Outline
b0 5V to a18V
b0 5 to VDD a 0 5V
b65 C to a150 C
700 mW
500 mW
Lead Temperature (TL)
(Soldering 10 seconds)
260 C
Recommended Operating
Conditions (Note 2)
Supply Voltage (VDD)
3 0V to 15V
Input Voltage (VIN)
0 to VDD
Operating Temperature Range (TA)
CD4014BM
CD4014BC
b55 C to a125 C
b40 C to a85 C
DC Electrical Characteristics CD4014BM (Note 2)
Symbol Parameter
Conditions
b55 C
Min Max
a25 C
Min Typ Max
a125 C Units
Min Max
IDD Quiescent Device VDD e 5V VIN e VDD or VSS
Current
VDD e 10V VIN e VDD or VSS
VDD e 15V VIN e VDD or VSS
5
10
20
01 5
0 2 10
0 3 20
150 mA
300 mA
600 mA
( l lVOL Low Level
VDD e 5V
Output Voltage VDD e 10V IO k 1 mA
VDD e 15V
0 05
0 05
0 05
0 0 05
0 0 05
0 0 05
0 05 V
0 05 V
0 05 V
( l lVOH
High Level
Output Voltage
VDD e 5V
VDD e 10V
VDD e 15V
IO k 1 mA
4 95
9 95
14 95
4 95
9 95
14 95
5
10
15
4 95
9 95
14 95
V
V
V
VIL Low Level
VDD e 5V VO e 0 5V or 4 5V
Input Voltage
VDD e 10V VO e 1 0V or 9 0V
VDD e 15V VO e 1 5V or 13 5V
15
30
40
2 15
4 30
6 40
15 V
30 V
40 V
VIH High Level
VDD e 5V VO e 0 5V or 4 5V
35
Input Voltage
VDD e 10V VO e 1 0V or 9 0V 7 0
VDD e 15V VO e 1 5V or 13 5V 11 0
35 3
70 6
11 0 9
35 V
70 V
11 0 V
IOL Low Level Output VDD e 5V VO e 0 4V
Current (Note 3) VDD e 10V VO e 0 5V
VDD e 15V VO e 1 5V
0 64
16
42
0 51 0 88
13 22
34 8
0 36 mA
0 9 mA
2 4 mA
IOH High Level Output VDD e 5V VO e 4 6V
Current (Note 3) VDD e 10V VO e 9 5V
VDD e 15V VO e 13 5V
b0 64
b1 6
b4 2
b0 51 b0 88
b1 3 b2 2
b3 4 b8
b0 36
b0 9
b2 4
mA
mA
mA
IIN
Input Current
VDD e 15V VIN e 0V
VDD e 15V VIN e 15V
b0 10
0 10
b10b5 b0 10
10b5 0 10
b1 0 mA
1 0 mA
DC Electrical Characteristics CD4014BC (Note 2)
Symbol
IDD
VOL
VOH
VIL
VIH
IOL
Parameter
Quiescent Device
Current
Low Level
Output Voltage
High Level
Output Voltage
Low Level
Input Voltage
High Level
Input Voltage
Low Level Output
Current (Note 3)
Conditions
VDD e 5V VIN e VDD or VSS
VDD e 10V VIN e VDD or VSS
VDD e 15V VIN e VDD or VSS
(VDD e 5V
VDD e 10V
VDD e 15V
lIOl k 1 mA
(VDD e 5V
VDD e 10V
VDD e 15V
lIOl k 1 mA
VDD e 5V VO e 0 5V or 4 5V
VDD e 10V VO e 1 0V or 9 0V
VDD e 15V VO e 1 5V or 13 5V
VDD e 5V VO e 0 5V or 4 5V
VDD e 10V VO e 1 0V or 9 0V
VDD e 15V VO e 1 5V or 13 5V
VDD e 5V VO e 0 4V
VDD e 10V VO e 0 5V
VDD e 15V VO e 1 5V
b40 C
Min Max
20
40
80
0 05
0 05
0 05
4 95
9 95
14 95
15
30
40
35
70
11 0
0 52
13
36
a25 C
Min Typ
01
02
03
0
0
0
4 95
9 95
14 95
5
10
15
2
4
6
35 3
70 6
11 0 9
0 44 0 88
11 22
30 8
Max
20
40
80
0 05
0 05
0 05
15
30
40
a85 C
Min Max
150
300
600
0 05
0 05
0 05
4 95
9 95
14 95
15
30
40
35
70
11 0
0 36
09
24
Units
mA
mA
mA
V
V
V
V
V
V
V
V
V
V
V
V
mA
mA
mA
2
Page 2

DC Electrical Characteristics CD4014BC (Note 2) (Continued)
Symbol
IOH
IIN
Parameter
High Level Output
Current (Note 3)
Input Current
Conditions
VDD e 5V VO e 4 6V
VDD e 10V VO e 9 5V
VDD e 15V VO e 13 5V
VDD e 15V VIN e 0V
VDD e 15V VIN e 15V
b40 C
Min Max
b0 52
b1 3
b3 6
b0 3
03
Min
b0 44
b1 1
b3 0
a25 C
Typ
b0 88
b2 2
b8
b10b5
10b5
Max
b0 3
03
a85 C
Min Max
b0 36
b0 90
b2 4
b1 0
10
Units
mA
mA
mA
mA
mA
AC Electrical Characteristics TA e 25 C input tr tf e 20 ns CL e 50 pF RL e 200 kX
Symbol
Parameter
Conditions Min Typ Max Units
tPHL tPLH
Propagation Delay Time
VDD e 5V
VDD e 10V
VDD e 15V
200 320
80 160
60 120
ns
ns
ns
tTHL tTLH
Transition Time
VDD e 5V
VDD e 10V
VDD e 15V
100 200
50 100
40 80
ns
ns
ns
fCL Maximum Clock
Input Frequency
VDD e 5V
VDD e 10V
VDD e 15V
28
6
8
4
12
16
MHz
MHz
MHz
tW Minimum Clock
Pulse Width
VDD e 5V
VDD e 10V
VDD e 15V
90 180
40 80
25 50
ns
ns
ns
trCL tfCL
Clock Rise and
Fall Time (Note 4)
VDD e 5V
VDD e 10V
VDD e 15V
15 ms
15 ms
15 ms
tS Minimum Set-Up Time
(Note 6) Serial Input
tH t 200 ns
VDD e 5V
VDD e 10V
VDD e 15V
60 120
40 80
30 60
ns
ns
ns
Parallel Inputs
tH t 200 ns
VDD e 5V
VDD e 10V
VDD e 15V
80 160
40 80
30 60
ns
ns
ns
Parallel Serial Control
tH t 200 ns
VDD e 5V
VDD e 10V
VDD e 15V
100 200
50 100
40 80
ns
ns
ns
tH Minimum Hold Time
VDD e 5V
Serial In Parallel In tS t 400 ns
VDD e 10V
Parallel Serial Control
VDD e 15V
0 ns
10 ns
15 ns
CI
Average Input Capacitance
Any Input
(Note 5)
5 7 5 pF
CPD Power Dissipation Capacitance
(Note 5)
110 pF
AC Parameters are guaranteed by DC correlated testing
Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation
Note 2 VSS e 0V unless otherwise specified
Note 3 IOL and IOH are tested one output at a time
Note 4 If more than one unit is cascaded trCL should be made less than or equal to the fixed propagation delay of the output of the driving stage for the estimated
capacitive load
Note 5 CPD determines the no load AC power consumption of any CMOS device For complete explanation see 54C 74C family characteristics application note
AN-90
Note 6 Setup times are measured with reference to clock and a fixed hold time (tH) as specified
3
Page 3
Part Number CD4014BC
Manufactur National Semiconductor
Description 8-Stage Static Shift Register
Total Page 6 Pages
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CD4014B , CD4014B , CD4014B-MIL , CD4014BC , CD4014BC , CD4014BM , CD4014BM , CD4014BMS ,

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