datasheet4u.com

900,000+ datasheet pdf search and download

Datasheet4U offers most rated semiconductors data sheet pdf



Fairchild Semiconductor
Fairchild Semiconductor

CD4044BC Datasheet

Quad 3-STATE NAND R/S Latches


CD4044BC Datasheet Preview


October 1987
Revised January 1999
CD4043BC • CD4044BC
Quad 3-STATE NOR R/S Latches •
Quad 3-STATE NAND R/S Latches
General Description
The CD4043BC are quad cross-couple 3-STATE CMOS
NOR latches, and the CD4044BC are quad cross-couple 3-
STATE CMOS NAND latches. Each latch has a separate Q
output and individual SET and RESET inputs. There is a
common 3-STATE ENABLE input for all four latches. A
logic “1” on the ENABLE input connects the latch states to
the Q outputs. A logic “0” on the ENABLE input discon-
nects the latch states from the Q outputs resulting in an
open circuit condition on the Q output. The 3-STATE fea-
ture allows common bussing of the outputs.
Features
s Wide supply voltage range: 3V to 15V
s Low power: 100 nW (typ.)
s High noise immunity: 0.45 VDD (typ.)
s Separate SET and RESET inputs for each latch
s NOR and NAND configuration
s 3-STATE output with common output enable
Applications
• Multiple bus storage
• Strobed register
• Four bits of independent storage with output enable
• General digital logic
Ordering Code:
Order Number Package Number
Package Description
CD4043BCM
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
CD4043BCN
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
CD4044BCM
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
CD4044BCSJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
CD4044BCN
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
Pin Assignments for DIP, SOIC and SOP
CD4043BC
Pin Assignments for DIP and SOIC
CD4044BC
Top View
© 1999 Fairchild Semiconductor Corporation DS005967.prf
Top View
www.fairchildsemi.com
Page 1

Block Diagrams
CD4043BC
CD4044BC
Truth Tables
CD4043BC
SRE
XX0
001
101
011
111
OC = 3-STATE
NC = No change
X = Don’t care
∆ = Dominated by S = 1 input
∆∆ = Dominated by R = 0 input
Q
OC
NC
1
0
CD4044BC
SREQ
X X 0 OC
1 1 1 NC
0111
1010
0 0 1 ∆∆
www.fairchildsemi.com
2
Page 2

Absolute Maximum Ratings(Note 1)
(Note 2)
Supply Voltage (VDD)
Input Voltage (VIN)
Storage Temperature Range (TS)
Power Dissipation (PD)
Dual-In-Line
Small Outline
Lead Temperature (TL)
(Soldering, 10 seconds)
0.5V to +18V
0.5V to VDD +0.5V
65°C to +150°C
700 mW
500 mW
260°C
DC Electrical Characteristics (Note 2)
Symbol
Parameter
Conditions
IDD Quiescent
VDD = 5V, VIN = VDD or VSS
Device Current
VDD = 10V, VIN = VDD or VSS
VDD = 15V, VIN = VDD or VSS
VOL LOW Level
|IO| 1 µA, VIL = 0V, VIH = VDD
Output Voltage
VDD = 5.0V
VDD = 10V
VDD = 15V
VOH HIGH Level
|IO| 1 µA, VIL = 0V, VIH = VDD
Output Voltage
VDD = 5.0V
VDD = 10V
VDD = 15V
VIL LOW Level
|IO| 1 µA
Input Voltage
VDD = 5.0V, VO = 0.5V or 4.5V
VDD = 10V, VO = 1.0V or 9.0V
VDD = 15V, VO = 1.5V or 13.5V
VIH HIGH Level
|IO| 1 µA
Input Voltage
VDD = 5.0V, VO = 0.5V or 4.5V
VDD = 5.0V, VO = 1.0V or 9.0V
VDD = 15V, VO = 1.5V or 13.5V
IOL LOW Level
VIL = 0V, VIH = VDD
Output Current
VDD = 5.0V, VO = 0.4V
(Note 3)
VDD = 10V, VO = 0.5V
VDD = 15V, VO = 1.5V
IOH HIGH Level
VIL = 0V, VIH = VDD
Output Current
VDD = 5.0V, VO = 4.6V
(Note 3)
VDD = 10V, VO = 9.5V
VDD = 15V, VO = 13.5V
IIN Input Current
VDD = 15V, VIN = 0V
VDD = 15V, VIN = 15V
Note 3: IOH and IOL are tested one output at a time.
Recommended Operating
Conditions
(Note 2)
Supply Voltage (VDD)
Input Voltage (VIN)
Operating Temperature Range (TA)
CD4043BC, CD4044BC
3.0V to 15V
0 to VDD V
40°C to +85°C
Note 1: “Absolute Maximum Ratings” are those values beyond which the
safety of the device cannot be guaranteed; they are not meant to imply that
the devices should be operated at these limits. The tables of “Recom-
mended Operating Conditions” and “Electrical Characteristics” provide con-
ditions for actual device operation.
Note 2: VSS = 0V unless otherwise specified.
40°C
Min Max
20
40
80
+25°C
Min Typ Max
0.01 20
0.01 40
0.02 80
+85°C
Min Max
150
300
600
Units
µA
µA
µA
0.05
0.05
0.05
0 0.05
0 0.05
0 0.05
0.05
0.05
0.05
V
V
V
4.95
9.95
14.95
4.95
9.95
14.95
5.0
10
15
4.95
9.95
14.95
V
V
V
1.5 2.25 1.5
3.0 4.5 3.0
4.0 6.75 4.0
1.5 V
3.0 V
4.0 V
3.5 3.5
7.0 7.0
11 11
3.5 V
7.0 V
11 V
0.52
1.3
3.6
0.44
1.1
3.0
0.88
2.2
6.0
0.36
0.9
2.4
mA
mA
mA
0.52
1.3
3.6
0.3
0.3
0.44
1.1
3.0
0.32
0.8
2.4
0.3
0.3
0.36
0.9
2.4
1.0
1.0
mA
mA
mA
µA
µA
3 www.fairchildsemi.com
Page 3
Part Number CD4044BC
Manufactur Fairchild Semiconductor
Description Quad 3-STATE NAND R/S Latches
Total Page 6 Pages
PDF Download
CD4044BC datasheet pdf
Download PDF File
CD4044BC view html
View PDF for Mobile


Related Datasheet

CD4044B , CD4044B , CD4044BC , CD4044BC , CD4044BM , CD4044BMS ,

Site map

Webmaste! click here

Contact us

Buy Components

Privacy Policy