NE33200 SUPER LOW NOISE HJ FET

California Eastern

Description

SUPER LOW NOISE HJ FET NE33200 .
The NE33200 is a Hetero-Junction FET chip that utilizes the junction between Si-doped AlGaAs and undoped InGaAs to create a two-dimensional electron g.

📥 Download Datasheet

NE33200 Datasheet Preview — Preview of NE33200 PDF

Datasheet Specifications

Part number: NE33200
Manufacturer: California Eastern
File Size: 87.71 KB
Datasheet: NE33200-CaliforniaEastern.pdf
Description: SUPER LOW NOISE HJ FET

Features

* VERY LOW NOISE FIGURE: 0.75 dB typical at 12 GHz Optimum Noise Figure, NFOPT (dB) 4 3.5 NOISE FIGURE & ASSOCIATED GAIN vs. FREQUENCY VDS = 2 V, IDS = 10 mA 24 21 18 15 12 9 6 NF 0.5 0 1 10 30 3 0
* HIGH ASSOCIATED GAIN: 10.5 dB Typical at 12 GHz
* GATE LENGTH: 0.3 µm

Applications

* NEC's stringent quality assurance and test procedures assure the highest reliability and performance. Frequency, f (GHz) ELECTRICAL CHARACTERISTICS (TA = 25°C) PART NUMBER PACKAGE OUTLINE SYMBOLS NFOPT1 PARAMETERS AND CONDITIONS Noise Figure, VDS = 2 V, ID = 10 mA, f = 4 GHz f = 12 GHz Associat

NE33200 Distributors

📁 Related Datasheet

NE33284 NE33284A NE33284A-SL NE33284A-T1 NE33284A-T1A NE334S01

📌 All Tags

NE33200 SUPER LOW NOISE FET California Eastern

California Eastern NE33200-like datasheet