NE33200 Datasheet, Fet, California Eastern

NE33200 Features

• Fet
• VERY LOW NOISE FIGURE: 0.75 dB typical at 12 GHz Optimum Noise Figure, NFOPT (dB) 4 3.5 NOISE FIGURE & ASSOCIATED GAIN vs. FREQUENCY VDS = 2 V, IDS = 10 mA 24 21 18 15 12 9 6

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NE33200

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California Eastern

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📄 Datasheet

Description:

Super low noise hj fet. The NE33200 is a Hetero-Junction FET chip that utilizes the junction between Si-doped AlGaAs and undoped InGaAs to create a two-dimen

NE33200 Application

• Applications NEC's stringent quality assurance and test procedures assure the highest reliability and performance. Frequency, f (GHz) ELECTRICAL

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NE33200

California Eastern

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