CMU5N50 Datasheet - Cmos

CMU5N50 N-Channel Transistor

These N-Channel enhancement mode power field effect transistors are produced using advanced technology which has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are .

CMU5N50 Features

* TO252 / TO251 Pin Configuration Low gate charge (typical 27 nC) Low Crss ( typical 17 pF) Fast switching 100%avalanche tested Improved dv/dt capability D G S TO252 G D S TO251 (CMD5N50) (CMU5N50) Absolute Maximum Ratings TC = 25°C unless otherwise noted Symbol Parameter VDSS Drain-Source

CMU5N50-Cmos.pdf