CY14C101J Datasheet - Cypress Semiconductor

CY14C101J 1-Mbit (128 K X 8) Serial (I2C) nvSRAM

Clock. Runs at speeds up to a maximum of fSCL. I/O. Input/Output of data through I2C interface. Write Protect. Protects the memory from all writes. This pin is internally pulled LOW and hence can be left open if not connected. Slave Address. Defines the slave address for I2C. This pin is internally .

CY14C101J Features

* CY14C101J CY14B101J, CY14E101J 2 1-Mbit nonvolatile static random access memory (nvSRAM)

* Internally organized as 128 K × 8

* STORE to QuantumTrap nonvolatile elements initiated automatically on power-down (AutoStore) or by using I2C command (Software STORE) or HSB pin (Hardwa

CY14C101J_CypressSemiconductor.pdf