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CY14C512J, CY14B512J Datasheet - Cypress Semiconductor

CY14C512J 512-Kbit (64 K x 8) Serial (I2C) nvSRAM

Clock. Runs at speeds up to a maximum of fSCL. I/O. Input/Output of data through I2C interface. Write Protect. Protects the memory from all writes. This pin is internally pulled LOW and hence can be left open if not connected. Slave Address. Defines the slave address for I2C. This pin is internally .

CY14C512J Features

* 512-Kbit nonvolatile static random access memory (nvSRAM)

* Internally organized as 64 K × 8

* STORE to QuantumTrap nonvolatile elements initiated automatically on power-down (AutoStore) or by using I2C command (Software STORE) or HSB pin (Hardware STORE)

* RECALL to SRAM i

CY14B512J_CypressSemiconductor.pdf

This datasheet PDF includes multiple part numbers: CY14C512J, CY14B512J. Please refer to the document for exact specifications by model.
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Datasheet Details

Part number:

CY14C512J, CY14B512J

Manufacturer:

Cypress Semiconductor

File Size:

1.49 MB

Description:

512-kbit (64 k x 8) serial (i2c) nvsram.

Note:

This datasheet PDF includes multiple part numbers: CY14C512J, CY14B512J.
Please refer to the document for exact specifications by model.

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TAGS

CY14C512J CY14B512J 512-Kbit Serial I2C nvSRAM Cypress Semiconductor

CY14C512J Distributor