Description
CY7C006A CY7C007A CY7C017A32K/16K x 8, 32K x 9 Dual-Port Static RAM .
Architecture
The CY7C006A, CY7C007A, CY7C016A and CY7C017A consist of an array of 32K/16K words of 8 bits and 32K words of 9 bits each of dual-port R.
Features
* True dual-ported memory cells which allow simultaneous access of the same memory location
* 16K x 8 organization (CY7C006A)
w
w
* 32K x 8 organization (CY7C007A)
* 16K x 9 organization (CY7C016A)
* 32K x 9 organization (CY7C017A)
* 0.35-micron CM
Applications
* without the need for separate master and slave devices or additional discrete logic. Application areas include interprocessor/multiprocessor designs, communications status buffering, and dual-port video/graphics memory. Each port has independent control pins: Chip Enable (CE), Read or Write Enable (
