CY7C1410AV18 Datasheet - Cypress Semiconductor

CY7C1410AV18 (CY7C14xxAV18) 36-Mbit QDR-II SRAM 2-Word Burst Architecture

The CY7C1410AV18, CY7C1425AV18, CY7C1412AV18, and CY7C1414AV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture. QDR-II architecture consists of two separate ports to access the memory array. The Read port has dedicated Data Outputs to support Read operations and the Write Po.

CY7C1410AV18 Features

* Separate Independent Read and Write data ports

* Supports concurrent transactions

* 250-MHz clock for high bandwidth

* 2-Word Burst on all accesses

* Double Data Rate (DDR) interfaces on both Read and Write www.DataSheet4U.com ports (data transferred at 500

CY7C1410AV18 Datasheet (1.19 MB)

CY7C1410AV18 Datasheet Preview — Preview of CY7C1410AV18 PDF

Datasheet Details

Part number:

CY7C1410AV18

Manufacturer:

Cypress Semiconductor

File Size:

1.19 MB

Description:

(cy7c14xxav18) 36-mbit qdr-ii sram 2-word burst architecture.

📁 Related Datasheet

CY7C1410JV18 (CY7C14xxJV18) SRAM 2-Word Burst Architecture (Cypress Semiconductor)

CY7C1410V18 (CY7C14xxV18) SRAM 2-Word Burst Architecture (Cypress Semiconductor)

CY7C141 1K x 8 Dual-Port Static RAM (Cypress Semiconductor)

CY7C1411AV18 (CY7C14xxAV18) 36-Mbit QDR-II SRAM 4-Word Burst Architecture (Cypress Semiconductor)

CY7C1411BV18 (CY7C14xxBV18) 36-Mbit QDR-II SRAM 4-Word Burst Architecture (Cypress Semiconductor)

CY7C1411JV18 (CY7C14xxJV18) 36-Mbit QDR-II SRAM 4-Word Burst Architecture (Cypress Semiconductor)

CY7C1411KV18 36-Mbit QDR II SRAM Four-Word Burst Architecture (Cypress Semiconductor)

CY7C1412AV18 (CY7C14xxAV18) 36-Mbit QDR-II SRAM 2-Word Burst Architecture (Cypress Semiconductor)

TAGS

CY7C1410AV18 CY7C14xxAV18 36-Mbit QDR-II SRAM 2-Word Burst Architecture Cypress Semiconductor

CY7C1410AV18 Distributor