The CY7C1410AV18, CY7C1425AV18, CY7C1412AV18, and CY7C1414AV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture.
QDR-II architecture consists of two separate ports to access the memory array.
The Read port has dedicated Data Outputs to support Read operations and the Write Po
CY7C1410AV18 Features
* Separate Independent Read and Write data ports
* Supports concurrent transactions
* 250-MHz clock for high bandwidth
* 2-Word Burst on all accesses
* Double Data Rate (DDR) interfaces on both Read and Write www.DataSheet4U.com ports (data transferred at 500
CY7C1412AV18_CypressSemiconductor.pdf
Datasheet Details
CY7C1410AV18, CY7C1412AV18
Cypress Semiconductor
1.19 MB
(cy7c14xxav18) 36-mbit qdr-ii sram 2-word burst architecture.
This datasheet PDF includes multiple part numbers: CY7C1410AV18, CY7C1412AV18.
Please refer to the document for exact specifications by model.
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