CY7C1410JV18 - (CY7C14xxJV18) SRAM 2-Word Burst Architecture
The CY7C1410JV18, CY7C1425JV18, CY7C1412JV18, and CY7C1414JV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR-II architecture.
QDR-II architecture consists of two separate ports: the read port and the write port to access the memory array.
The read port has data outputs to support read oper
CY7C1410JV18 Features
* Configurations CY7C1410JV18
* 4M x 8 CY7C1425JV18
* 4M x 9 CY7C1412JV18
* 2M x 18 CY7C1414JV18
* 1M x 36 Separate independent read and write data ports
* Supports concurrent transactions 267 MHz clock for high bandwidth 2-word burst on all accesses (data t
