CY7C1410V18, CY7C1412V18 Datasheet - Cypress Semiconductor

CY7C1410V18 (CY7C14xxV18) SRAM 2-Word Burst Architecture

The CY7C1410V18, CY7C1425V18, CY7C1412V18, and CY7C1414V18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture. QDR-II architecture consists of two separate ports to access the memory array. The Read port has dedicated Data Outputs to support Read operations and the Write Port h.

CY7C1410V18 Features

* Separate Independent Read and Write data ports

* Supports concurrent transactions

* 200-MHz clock for high bandwidth

* 2-Word Burst on all accesses

* Double Data Rate (DDR) interfaces on both Read and Write ports (data transferred at 400 MHz) @ 200 MHz www.D

CY7C1412V18_CypressSemiconductor.pdf

CY7C1410V18 Datasheet Preview — This datasheet PDF includes multiple part numbers: CY7C1410V18, CY7C1412V18. Please refer to the document for exact specifications by model.

Datasheet Details

Part number:

CY7C1410V18, CY7C1412V18

Manufacturer:

Cypress Semiconductor

File Size:

459.26 KB

Description:

(cy7c14xxv18) sram 2-word burst architecture.

Note:

This datasheet PDF includes multiple part numbers: CY7C1410V18, CY7C1412V18.
Please refer to the document for exact specifications by model.

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TAGS

CY7C1410V18 CY7C1412V18 CY7C14xxV18 SRAM 2-Word Burst Architecture Cypress Semiconductor

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