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Z9973 Multi-Output Zero Delay Buffer

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Description

www.DataSheet4U.com Z9973 3.3V, 125-MHz, Multi-Output Zero Delay Buffer .
[2] Pin Number 11 12 9 10 44, 46, 48, 50 32, 34, 36, 38 16, 18, 21, 23 29 Pin Name PECL_CLK PECL_CLK# TCLK0 TCLK1 QA(3:0) QB(3:0) QC(3:0) FB_OUT VDDC.

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Datasheet Specifications

Part number
Z9973
Manufacturer
Cypress Semiconductor
File Size
129.10 KB
Datasheet
Z9973_CypressSemiconductor.pdf
Description
Multi-Output Zero Delay Buffer

Features

* Output frequency up to 125 MHz 12 clock outputs: frequency configurable 350 ps max output-to-output skew Configurable output disable Two reference clock inputs for dynamic toggling

Applications

* the Z9973 offers a low-voltage PECL clock input as a PLL reference. This allows the user to use LVPECL as the primary clock distribution device to take advantage of its far superior skew performance. The Z9973 can then lock onto the LVPECL reference and translate with near-zero delay to low-skew out

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