* Pin compatible and functionally equivalent to ZBT™
* Supports 250-MHz bus operations with zero wait states
* Available speed grades are 250 and 167 MHz
* Internally self-timed output buffer control to eliminate the need to use asynchronous OE
* Fully registered (inputs and outp
CY7C1460SV25 Datasheet (351.51 KB)
CY7C1460SV25
Cypress
351.51 KB
36-mbit (1m x 36/2m x 18) pipelined sram.
CY7C1460SV25 CY7C1462SV25
36-Mbit (1M × 36/2M × 18) Pipelined SRAM with NoBL™ Architecture
36-Mbit (1M × 36/2M × 18) Pipelined SRAM with NoBL™ Archit.
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