Description
7
I/O Circuit Type 9
Handling Devices 10
Block Diagram
Features
- Clock.
- Built-in PLL clock frequency multiplication circuit.
- Selection of machine clocks (PLL clocks) is allowed among
frequency division by two on oscillation clock, and multiplication of 1 to 4 times of oscillation clock (for 4-MHz oscillation clock, 4 MHz to 16 MHz).
- Operation by sub-clock (8.192 kHz) is allowed. (MB90387, MB90F387).
- Minimum execution time of instruction: 62.5 ns (when operating with 4-MHz oscillation clock, and 4-time multiplied PLL clock). 16 Mbyte CPU m.
MB90387-Cypress.pdf