IN74AC109 Datasheet - ETC

IN74AC109, Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS

TECHNICAL DATA IN74AC109 Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS The IN74AC109 is identical in pinout to the LS/ALS109,HC.

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IN74AC109_ETC.pdf

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Datasheet Details

Part number:

IN74AC109

Manufacturer:

ETC

File Size:

170.72 KB

Description:

Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS

Applications

* of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND≤(VIN or VOUT)≤VCC. Unused inputs must always be tied to an appropriate logic voltage level (e. g. , either GND or VCC). Unused outputs must be lef

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IN74AC109 Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS ETC

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