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QL8250 Datasheet - ETC

QL8250 LOW POWER FPGA COMBINING PERFORMANCE DENSITY AND EMBEDED RAM

(FOLSVH,, )DPLO 'DWD 6KHHW ‡‡‡‡‡‡ /RZ 3RZHU )3 $ &RPELQLQJ 3HUIRUPDQFH 'HQVLW DQG (PEHGGHG 5$0 'HYLFH +LJKOLJKWV )OH[LEOH 3URJUDPPDEOH /RJLF ‡ 0.18 µ, six layer metal CMOS process ‡ 1.8 V Vcc, 1.8/2.5/3.3 V drive capable I/O ‡ Up to 4,008 dedicated flip-flops ‡ Up to 55.3 K embedded RAM Bits ‡ Up to 313 I/O ‡ Up to 370 K system gates ‡ IEEE 1149.1 Boundary Scan Testing $GYDQFHG &ORFN 1HWZRUN ‡ Multiple dedicated Low Skew Clock Networks ‡ High drive input-only networks ‡ Quadrant-based .

QL8250 Datasheet (739.40 KB)

Preview of QL8250 PDF

Datasheet Details

Part number:

QL8250

Manufacturer:

ETC

File Size:

739.40 KB

Description:

Low power fpga combining performance density and embeded ram.

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QL8250 LOW POWER FPGA COMBINING PERFORMANCE DENSITY AND EMBEDED RAM ETC

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