S5933QE Datasheet - ETC

S5933QE Controller Device Summary

: When performing a bus master write to the PCI bus, if only one location of the FIFO remains full, the S5933 deasasserts FRAME# on the next clock to indicate the last data phase is in progress. If another value is written from the add-on at the right moment, an internal condition may cause IRDY# to.

www.DataSheet4U.com DUPLICATE OF A ORIGINAL DOCUMENT FROM AMCC S5933QE PCI Controller Device Summary www.DataSheet4U.com DUPLICATE OF A ORIGINAL DOCUMENT FROM AMCC S5933 PCI CONTROLLER DEVICE SUMMARY PCI S5933QE Matchmaker Device Summary Revision 2, November 1, 1997 The following are all known device and document variations for the AMCC S5933QE PCI Matchmaker and 1997 device data book. The workarounds described below are factory suggestions and are not to imply the only or all possible solut.

S5933QE Datasheet (79.69 KB)