EBE11UD8AGUA - 1GB DDR2 SDRAM SO-DIMM

Elpida Memory

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Datasheet Details

Part number	EBE11UD8AGUA
Manufacturer	Elpida Memory
File Size	235.52 KB
Description	1GB DDR2 SDRAM SO-DIMM
Datasheet	EBE11UD8AGUA_ElpidaMemory.pdf

EBE11UD8AGUA Product details

Description

Pin name A0 to A13 A10 (AP) BA0, BA1 DQ0 to DQ63 /RAS /CAS /WE /CS0, /CS1 CKE0, CKE1 CK0, CK1 /CK0, /CK1 DQS0 to DQS7, /DQS0 to /DQS7 DM0 to DM7 SCL SDA SA0, SA1 VDD VDDSPD VREF VSS ODT0, ODT1 NC Function Address input Row address Column address Auto precharge Bank select address Data input/output Row address strobe command Column address strobe command Write enable Chip select Clock enable Clock input Differential clock input Input and output data strobe Input mask Clock input for serial PD Dat

Features

Double-data-rate architecture; two data transfers per clock cycle.
The high-speed data transfer is realized by the 4 bits prefetch pipelined architecture.
Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the receiver.
DQS is edge-aligned with data for READs; centeraligned with data for WRITEs.
Differential clock inputs (CK and /CK).
DLL aligns DQ and DQS transitions with CK transi.

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Published: Mar 21, 2010 |