EDS2532EEBH-75 Datasheet (Elpida Memory)

EDS2532EEBH-75, 256M bits SDRAM

The EDS2532EEBH is a 256M bits SDRAM organized as 2,097,152 words × 32 bits × 4 banks.

All inputs and outputs are synchronized with the positive edge of the clock.

It is packaged in 90-ball FBGA.

Pin Configurations /xxx indicate active low signal.

90-ball FBGA 1 2 3 4 5 6 7 8 9 A DQ26 DQ24 VSS VDD

EDS2532EEBH-75 Features

* 1.8V power supply Clock frequency: 133MHz (max.) LVCMOS interface Single pulsed /RAS ×32 organization 4 banks can operate simultaneously and independently

* Burst read/write operation and burst read/single write operation capability