EDS2532JEBH-6B Datasheet - Elpida Memory

EDS2532JEBH-6B 256M bits SDRAM

www.DataSheet4U.com PRELIMINARY DATA SHEET 256M bits SDRAM EDS2532JEBH-6B (8M words × 32 bits) Specifications Density: 256M bits Organization ⎯ 2M words × 32 bits × 4 banks Package: 90-ball FBGA ⎯ Lead-free (RoHS compliant) Power supply: VDD, VDDQ = 2.5V ± 0.2V Clock frequency: 166MHz (max.) 2KB page size ⎯ Row address: A0 to A11 ⎯ Column address: A0 to A8 Four internal banks for concurrent operation Interface: LVC.

EDS2532JEBH-6B Features

* ×32 organization

* Single pulsed /RAS

* Burst read/write operation and burst read/single write operation capability

* Byte control by DQM (Top view) A0 to A11 BA0, BA1 DQ0 to DQ31 /CS /RAS /CAS /WE DQM0 to DQM3 CKE CLK VDD VSS VDDQ VSSQ NC Address inputs Bank selec

EDS2532JEBH-6B_ElpidaMemory.pdf