EUP7998 Datasheet (Eutech) - Sink/Source DDR Termination Regulator

EUP7998, Sink/Source DDR Termination Regulator

The EUP7998 is a high performance linear regulator designed to provide power for termination of a DDR memory bus.

It significantly reduces parts count, board space and overall system cost over previous switching solutions.

The EUP7998 maintains a fast transient response using only 20μF or 30μF outpu

EUP7998 Features

* z z z z z z z z z z z VLDOIN Input Voltage Range: 1.1V to 3.5V VIN Input Voltage Range: 2.375V to 5.5V Typically 3 × 10μF MLCCs stable for DDR Fast Load-Transient Response ±10mA Buffered Reference (REFOUT) Meet DDR, DDR2 JEDEC Specifications. Supports DDR3 and Low-Power DDR3/DDR4 VTT Applications Po