74ACT377, 74AC Datasheet - Fairchild Semiconductor

74ACT377 Octal D-Type Flip-Flop

The AC/ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time before the LO.

74ACT377 Features

* s ICC reduced by 50% s Ideal for addressable register applications s Clock enable for address and data synchronization applications s Eight edge-triggered D-type flip-flops s Buffered common clock s Outputs source/sink 24 mA s See 273 for master reset version s See 373 for transparent latch version

74AC-377.pdf