74ALVC16839 Datasheet - Fairchild Semiconductor

74ALVC16839 Low Voltage 20-Bit Selectable Register/Buffer

The ALVC16839 contains twenty non-inverting selectable buffered or registered paths. The device can be configured to operate in a registered, or flow through buffer mode by utilizing the register enable (REGE) and Clock (CLK) signals. The device operates in a 20-bit word wide mode. All outputs can b.

74ALVC16839 Features

* s Compatible with PC100 and PC133 DIMM module specifications s 1.65V to 3.6V VCC supply operation s 3.6V tolerant inputs and outputs s tPD (CLK to O n) 3.7 ns max for 3.0V to 3.6V VCC 4.9 ns max for 2.3V to 2.7V VCC 8.8 ns max for 1.65V to 1.95V VCC s Power-off high impedance inputs and outputs s Su

74ALVC16839 Datasheet (81.86 KB)