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74LCX112 - Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop

74LCX112 Description

74LCX112 Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs June 1998 Revised February 2001 74LCX112 Low Voltage Dual J-.
The LCX112 is a dual J-K flip-flop.

74LCX112 Features

* s 5V tolerant inputs s 2.3V
* 3.6V VCC specifications provided s 7.5 ns tPD max (VCC = 3.3V), 10 µA ICC max s Power down high impedance inputs and outputs s ±24 mA output drive (VCC = 3.0V) s Implements patented noise/EMI reduction circuitry s Latch-up performance exceeds 500 mA s ESD performa

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Datasheet Details

Part number
74LCX112
Manufacturer
Fairchild Semiconductor
File Size
124.96 KB
Datasheet
74LCX112_FairchildSemiconductor.pdf
Description
Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop

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Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop Fairchild Semiconductor
Fairchild Semiconductor 74LCX112-like datasheet