74LCX112 - Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop
The LCX112 is a dual J-K flip-flop.
Each flip-flop has independent J, K, PRESET, CLEAR, and CLOCK inputs with Q, Q outputs.
These devices are edge sensitive and change state on the negative going transition of the clock pulse.
Clear and preset are independent of the clock and accomplished by a low l
74LCX112 Features
* s 5V tolerant inputs s 2.3V
* 3.6V VCC specifications provided s 7.5 ns tPD max (VCC = 3.3V), 10 µA ICC max s Power down high impedance inputs and outputs s ±24 mA output drive (VCC = 3.0V) s Implements patented noise/EMI reduction circuitry s Latch-up performance exceeds 500 mA s ESD performa
