Datasheet Specifications
- Part number
- DM74ALS165
- Manufacturer
- Fairchild Semiconductor
- File Size
- 63.85 KB
- Datasheet
- DM74ALS165_FairchildSemiconductor.pdf
- Description
- 8-Bit Parallel In/Serial Out Shift Register
Description
DM74ALS165 8-Bit Parallel In/Serial Out Shift Register January 1986 Revised February 2000 DM74ALS165 8-Bit Parallel In/Serial Out Shift Register Gen.Features
* a clock inhibit function and a complemented serial output, QH. Clocking is accomplished by a LOW-to-HIGH transition of the CLK input while SH/LD is held HIGH and CLK INH is held LOW. The functions of the CLK and CLK INH (clock inhibit) inputs are interchangeable. Since a LOW CLK input and a LOW-to-HDM74ALS165 Distributors
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