DM74S283
Description
These full adders perform the addition of two 4-bit binary numbers. The sum (∑) outputs are provided for each bit and the resultant carry (C4) is obtained from the fourth bit. These adders feature full internal look ahead across all four bits. This provides the system designer with partial lookahead performance at the economy and reduced package count of a ripple-carry implementation. The adder logic, including the carry, is implemented in its true form meaning that the end-around carry can be acplished without the need for logic or level inversion.
Features s Full-carry look-ahead across the four bits s Systems achieve partial look-ahead performance with the economy of ripple carry s Typical add times Two 8-bit words 15 ns Two 16-bit words 30 ns s Typical power dissipation 510 m W
Ordering Code:
Order Number DM74S283N Package Number N16E Package Description
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Connection Diagram
© 2000 Fairchild...
