FDMS8050
Features
General Description
- Max r DS(on) = 0.65 mΩ at VGS = 10 V, ID = 55 A
- Max r DS(on) = 0.9 mΩ at VGS = 4.5 V, ID = 47 A
- Advanced Package and Silicon bination for low r DS(on) and high efficiency
This N-Channel MOSFET has been designed specifically to improve the overall efficiency and to minimize switch node ringing of DC/DC converters using either synchronous or conventional switching PWM controllers. It has been optimized for low gate charge and extremely low r DS(on).
- MSL1 robust package design
- 100% UIL tested
- Ro HS pliant
Applications
- Oring FET
- Synchronous Rectifier
Top Pin 1
Bottom S Pin 1 S S G
Power 56
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol VDS VGS
EAS PD TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous -Continuous...
