4013 Datasheet | Fairchild Semiconductor

Description The CD4013B dual D-type flip-flop is a monolithic plementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement mode transistors. Each flip-flop has independent data, set, reset, and clock inputs and “Q” and “Q” outputs. These devices can be used for shift register applications, and by connecting “Q” output to the data input, for counter and toggle applications. The logic level present at the “D” input is transferred to the Q output during the positive-going transition of the clock pulse. Setting or resetting is independent of the clock and is acplished by a high level on the set or reset line respectively. Features s Wide supply voltage range: 3.0V to 15V s High noise immunity: 0.45 VDD (typ.) s Low power TTL: fan out of 2 driving 74L patibility: or 1 driving 74LS Applications - Automotive - Data terminals - Instrumentation - Medical electronics - Alarm system - Industrial electronics - Remote metering - puters Ordering Code: Order Number Package Number Package Description CD4013BCM M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow CD4013BCSJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide CD4013BCN N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Truth Table Top View CL D R S Q Q (Note 1) 00001 10010 x 0 0QQ x x1001 x x0110 x x1111 No Change x = Don't Care Case Note 1: Level Change © 2002 Fairchild Semiconductor Corporation DS005946 .fairchildsemi. CD4013BC Schematic Diagrams Logic Diagram .fairchildsemi. CD4013BC Absolute Maximum Ratings(Note...