MMC2001 - M-CORE Reference Manual
2-10 2.8.4 Bus Operation 2-11 2.8.5 Processor Instruction/Data Transfers 2-13 2.8.6 Bus Exception Cycles 2-14 SECTION 3 SYSTEM MEMORY MAP 3.1 Overview 3-1 3.2 Peripheral Module Address Allocation 3-1 3.3 Peripheral Module Interface Operation 3-2 3.4 Peripheral Module Address Assignment 3-2 SEC
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M CORE™ MMC2001 Reference Manual Revision 1.1 Motorola reserves the right to make changes without further notice to any products herein to improve reliability, function or design.
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