MB91151A Datasheet - Fujitsu Media Devices

Features

* CPU

* 32-bit RISC (FR30) , load/store architecture, 5-stage pipeline

* General-purpose registers : 32 bits × 16

* 16-bit fixed-length instructions (basic instructions) , 1 instruction/ 1 cycle

* Memory-to-memory transfer, bit processing, barrel shift processing : Opti