MBL8259A-2 Datasheet - Fujitsu

MBL8259A-2 NMOS PROGRAMMABLE INTERRUPT CONTROLLER

TABLE 1 - PIN DESCRIPTION Symbl Pin No. Type Vee 28 I GND 14 I CS 1 I WR 2 0 RD 3 I D 7 - Do 4-11 I/O CASo-CAS2 12,13,15 I/O SP/EN INT 16 I/O 17 0 IRo-IR7 18-25 I INTA Ao 26 I 27 I Name and Function Supply: +5V Supply. Ground Chip Select: A Iowan this pin enables R.

MBl8259A MBl8259A-2 NMOS PROGRAMMABLE INTERRUPT CONTROLLER July 1986 Edition 2.2 The MBL8259A Programmable Interupt Controller handles up to eight vectored priority interrupts for the CPU. It is cascadable for up to 64 vectored priority interrupts without additional circuitry. It is packaged in a 28-pin DIP, uses NMOS technology and requires a single +5V supply. Circuitry is static, requiring no clock input. The MBL8259A is designed to minimize the software and real time overhead in handling .

MBL8259A-2 Datasheet (1.38 MB)