GS820E32A Datasheet (GSI Technology) - 64K x 32 / 2M Synchronous Burst SRAM

GS820E32A, 64K x 32 / 2M Synchronous Burst SRAM

Applications The GS820E32A is a 2,097,152 bit high performance synchronous SRAM with a 2 bit burst address counter.

Although of a type originally developed for Level 2 Cache applications supporting high performance CPU’s, the device now finds application in synchronous SRAM applications ranging from

GS820E32A Features

* FT pin for user configurable flow through or pipelined operation.

* Dual Cycle Deselect (DCD) Operation.

* 3.3V +10%/-5% Core power supply

* 2.5V or 3.3V I/O supply.

* LBO pin for linear or interleaved burst mode.

* Internal input resistors on mode p